The present technique relates to an apparatus and method for processing an ownership upgrade request for cached data, where the ownership upgrade request is issued in relation to a conditional store operation.
A system may include a plurality of processing units that are coupled to memory via an interconnect structure. Within such systems, a mechanism may be provided to enable one of the processing units to obtain exclusive access to a memory location. In particular, the instructions executed by a processing unit may include an exclusive sequence that employs a load instruction in order to read the value of a memory location, and subsequently employs a conditional store instruction that will conditionally write an updated value to the same memory location. Such a load instruction and associated conditional store instruction may be referred to as a load-link and store-conditional (LL/SC) pair of instructions. When executing an exclusive sequence having a LL/SC pair of instructions, the store instruction will only write to the memory location if it is determined that the processing unit does have exclusive access to that memory location at the time the write operation is to be performed, and otherwise the write operation will not be performed, and the exclusive sequence will fail. When the exclusive sequence fails, then the processing unit will need to repeat the exclusive sequence of instructions in order to seek to reperform the access and update of the memory location.
Contention management circuitry may be provided within the system to seek to control contended access to a memory location by two or more of the processing units, and in particular to take steps to avoid livelock situations arising when there is such contended access.
When an exclusive sequence of instructions is executed in relation to a memory location that is cacheable, then the loaded data will typically be stored within the processing unit's cache. The other processing units may also have local cache structures, and a cache coherency protocol can be employed within the system to seek to ensure that each processing device is able to access the most up-to-date version of the data being maintained within the system.
When during performance of the earlier-mentioned exclusive sequence a processing unit executes the conditional store instruction to seek to update the memory location, and it is determined that the copy of the relevant data as held in its local cache is not currently in the unique state (i.e. one or more other processing units may also be caching a local copy of that data), then the processing unit may issue an ownership upgrade request to the interconnect to seek permission to hold that data in the unique state in its local cache, so that it can then perform the write operation in the knowledge that it has exclusive access to the relevant memory location.
In existing systems, the contention management circuitry is referred to at that point, since the ownership upgrade request should fail if there is contended access for the memory location.
However, it has been observed that in current systems this approach can lead to the ownership upgrade request failing unnecessarily, resulting in the exclusive sequence needing to be retried, and a resultant increase in the number of transactions taking place in the interconnect.
Accordingly, it would be desirable to provide an improved mechanism for processing ownership upgrade requests in relation to cached data.